{"id":1756,"date":"2021-06-08T03:03:25","date_gmt":"2021-06-08T00:03:25","guid":{"rendered":"https:\/\/www.tempatech.com\/?page_id=1756"},"modified":"2021-06-08T09:16:44","modified_gmt":"2021-06-08T06:16:44","slug":"semiconductors","status":"publish","type":"page","link":"https:\/\/www.tempatech.com\/tr\/softwares\/ansys\/semiconductors\/","title":{"rendered":"ANSYS \/ Yar\u0131 \u0130letkenler"},"content":{"rendered":"

Yar\u0131 \u0130letkenler<\/h3>\n\t
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\u00c7ipler ve 3D-IC Sistemleri i\u00e7in \u00c7oklu Fizik Analiz \u00c7\u00f6z\u00fcmleri<\/p>\n<\/div>\n<\/div>\n<\/div>\n<\/div>\n<\/div>\n<\/div>\n

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Bu \u00fcr\u00fcnlerin lisanslar\u0131 i\u00e7in bizimle ileti\u015fime ge\u00e7in!<\/span><\/span><\/span><\/a><\/div> <\/div><\/div><\/div><\/div><\/div>
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\"ANSYS<\/div>\n\t\t<\/figure>\n\t<\/div>\n<\/div><\/div><\/div>
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ANSYS <\/span>PowerArtist<\/span><\/span><\/strong><\/span><\/p>\n\n\t\t<\/div>\n\t<\/div>\n\n\t

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G\u00fc\u00e7 platformu i\u00e7in kapsay\u0131c\u0131 RTL tasar\u0131m\u0131 <\/strong><\/p>\n

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  • G\u00fc\u00e7 profili olu\u015fumuna ve b\u00fct\u00e7elendirilmesine g\u00f6z at\u0131n, RTL-Driven Power Grid Integrity ve daha fazlas\u0131...<\/li>\n
  • Analiz y\u00f6ntemiyle otomatik bir g\u00fc\u00e7 azaltma s\u00fcrecini y\u00f6netin, fiziksel etkileri ba\u011flamda tutarken mant\u0131k ve aktivitedeki de\u011fi\u015fikliklerin de\u011ferlendirilmesine dayal\u0131 azaltma f\u0131rsatlar\u0131n\u0131 belirleyin.<\/li>\n
  • RTL\u2019den fiziksel g\u00fcce sorunsuz ge\u00e7i\u015f metodolojisi i\u00e7in ANSYS RedHawk ile do\u011frudan etkile\u015fime ge\u00e7er.<\/li>\n
  • Bo\u015fa harcanan dinamik g\u00fcc\u00fc elimine edin. EARLY.<\/li>\n
  • Yaz\u0131l\u0131m uygulaman\u0131z\u0131n donan\u0131m g\u00fcc\u00fcn\u00fczle ne yapt\u0131\u011f\u0131n \u00f6\u011frenin. EARLY.<\/li>\n
  • Ger\u00e7ek uygulama senaryolar\u0131 i\u00e7in g\u00fcc\u00fcn\u00fcz\u00fc anl\u0131k olarak takip edin. EARLY.<\/li>\n<\/ul>\n\n\t\t<\/div>\n\t<\/div>\n<\/div><\/div><\/div><\/div><\/div>
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    ANSYS<\/span> RedHawk<\/span><\/span><\/strong><\/span><\/p>\n\n\t\t<\/div>\n\t<\/div>\n\n\t

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    • Sa\u011flam ve y\u00fcksek performansl\u0131 SoC\u2019ler yaratmak i\u00e7in t\u00fcm d\u00f6k\u00fcmhaneler ad\u0131na en tercih edilesi ve i\u015f bitirici \u00e7\u00f6z\u00fcm, son \u00e7\u0131kan FinFET teknolojisi kullan\u0131larak tasarland\u0131.<\/li>\n
    • IC'lerin b\u00fct\u00fcnl\u00fc\u011f\u00fcne ve g\u00fcvenilirli\u011fine y\u00f6nelik donat\u0131ld\u0131.<\/li>\n
    • Is\u0131ya, elektron g\u00f6\u00e7\u00fcne ve elektrostatik de\u015farja dayan\u0131kl\u0131 olman\u0131n yan\u0131 s\u0131ra g\u00fc\u00e7 verimlili\u011fi sunan SoC\u2019ler tasarlay\u0131n.<\/li>\n
    • \u00c7ipin sistemin tamam\u0131nda istenildi\u011fi gibi performans verdi\u011fini garanti alt\u0131na almak i\u00e7in ANSYS devre kart\u0131 ve sistem baz\u0131nda ara\u00e7lar\u0131 sayesinde birlikte \u00e7al\u0131\u015fabilen bir model sunar.<\/li>\n<\/ul>\n\n\t\t<\/div>\n\t<\/div>\n<\/div><\/div><\/div>
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      \"ANSYS<\/div>\n\t\t<\/figure>\n\t<\/div>\n<\/div><\/div><\/div><\/div><\/div>
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      \"ANSYS<\/div>\n\t\t<\/figure>\n\t<\/div>\n<\/div><\/div><\/div>
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      ANSYS<\/span> Totem<\/span><\/span><\/strong><\/span><\/p>\n\n\t\t<\/div>\n\t<\/div>\n\n\t

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      Bir transist\u00f6r d\u00fczeyinde g\u00fc\u00e7 g\u00fcr\u00fclt\u00fcs\u00fc ve g\u00fcvenilirlik sim\u00fclasyonu platformu, <\/strong><\/span><\/p>\n

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      • Paket ve alt tabaka parazitlerini hesaba katarak tasar\u0131m analizine olanak tan\u0131r.<\/span><\/li>\n
      • Hem dijital hem de analog i\u00e7eri\u011fe sahip karma\u015f\u0131k kar\u0131\u015f\u0131k sinyalli IP bloklar\u0131n\u0131 yerel olarak analiz edebilen tek \u00e7\u00f6z\u00fcmd\u00fcr.<\/span><\/li>\n
      • En zorlay\u0131c\u0131 g\u00fc\u00e7 g\u00fcr\u00fclt\u00fcs\u00fc ve g\u00fcvenilirlik gereksinimlerini kar\u015f\u0131layabilen, t\u00fcm d\u00f6k\u00fcmhaneler i\u00e7in (5nm'ye kadar) i\u015f bitirici bir platformdur.<\/span><\/li>\n<\/ul>\n\n\t\t<\/div>\n\t<\/div>\n<\/div><\/div><\/div><\/div><\/div>
        <\/div>","protected":false},"excerpt":{"rendered":"Semiconductors Multiphysics Analysis Solutions for Chips and 3D-IC Systems Contact us to get a product license ANSYS PowerArtist Comprehensive RTL design-for-power platform Look at power profiling and budgeting, RTL-Driven Power Grid Integrity and more Drive an automated power reduction process using analysis, by identifying reduction opportunities based on evaluations of changes to the logic and…","protected":false},"author":1,"featured_media":0,"parent":1794,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"_links":{"self":[{"href":"https:\/\/www.tempatech.com\/tr\/wp-json\/wp\/v2\/pages\/1756"}],"collection":[{"href":"https:\/\/www.tempatech.com\/tr\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/www.tempatech.com\/tr\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/www.tempatech.com\/tr\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.tempatech.com\/tr\/wp-json\/wp\/v2\/comments?post=1756"}],"version-history":[{"count":2,"href":"https:\/\/www.tempatech.com\/tr\/wp-json\/wp\/v2\/pages\/1756\/revisions"}],"predecessor-version":[{"id":1772,"href":"https:\/\/www.tempatech.com\/tr\/wp-json\/wp\/v2\/pages\/1756\/revisions\/1772"}],"up":[{"embeddable":true,"href":"https:\/\/www.tempatech.com\/tr\/wp-json\/wp\/v2\/pages\/1794"}],"wp:attachment":[{"href":"https:\/\/www.tempatech.com\/tr\/wp-json\/wp\/v2\/media?parent=1756"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}